Contactless passive integrated circuits are generally intended for RFID (Radio Frequency IDentification) applications and can be of inductive coupling- or “electrical coupling”-type.
Passive integrated circuits of the first type comprise an antenna coil, send data by load modulation and are powered by inductive coupling in the presence of a magnetic field the frequency of which is generally in the order of approximately ten MHz. Such integrated circuits are for example described by the ISO/IEC 14443A/B and ISO/IEC 15693 standards that provide for a working frequency of 13.56 MHz.
Passive integrated circuits of the second type are electrically powered by a UHF electric field oscillating at several hundred MHz, and send data by modulating the reflectance rate of their antenna circuit (technique called “backscattering”). Such integrated circuits are for example described by the industrial specification EPCTM-GEN2 (“Radio-Frequency Identity Protocols Class-1 Generation-2—UHF RFID Protocol for Communications at 860 MHz-960 MHz”) which is in the course of standardization. They are generally used in so-called “long range” applications, in which the distance between the integrated circuit and a data send/receive station sending the electrical field, commonly called reader, can reach several meters.
As these integrated circuits are passive, i.e., remotely electrically powered, their range directly depends on their power consumption. In other terms, the less energy they consume, the greater their range is. Therefore, it is useful to reduce their current consumption as far as possible. From this perspective, the memory of the integrated circuit is a considerable electrical energy consuming item.
One or more words can be block written either simultaneously or sequentially in an EEPROM-type memory for example. The memory cells of the memory are distributed along word lines and bit lines transversal to the word lines. To enable several words to be simultaneously written, each word line groups together the memory cells corresponding to the number of bits forming a word, multiplied by the maximum number of words capable of being programmed simultaneously. All of the words in a word line form a page. The memory cells are programmed using a programming latch connected to each bit line. As a result, the number of words capable of being programmed simultaneously is directly linked to the number of programming latches.
Now, the programming of the memory cells requires, in particular, a high voltage to be applied to the programming latches connected to the bit lines of the memory cells to be programmed. This high voltage is produced by a high voltage generator using the energy received by the integrated circuit. The energy received by the integrated circuit must therefore be sufficient to generate a high voltage capable of supplying all of the programming latches. Furthermore, the programming latches comprise high voltage transistors that contribute to increasing the active surface of the memory, this active surface having a direct impact on the power consumption. When they are not active, these high voltage transistors also have a considerable leakage rate that contributes to increasing the power consumption of the memory. As a result, the number of programming latches in a memory directly impacts the power consumption of the memory.
The result is that memories programmable by page of several words are little suited to contactless passive integrated circuits, particularly if it is desired to increase the range thereof.
Furthermore, the possibility of simulating a page-programming mode in a memory that is only word-programmable has already been considered. For this purpose, the words of the block to be written are stored in a buffer memory, and then written sequentially in the memory. For a block of several words to be written in the memory within a determined time, it is generally necessary to reduce the duration of the memory write cycle. Now, programming a memory cell needs a high voltage to be applied to the programming latches for a certain time which can only be reduced at the cost of decreasing the programming reliability. Furthermore, this high voltage should be applied gradually so as not to damage the floating-gate transistors of the memory cells.